
188
8008H–AVR–04/11
ATtiny48/88
20. Lock Bits, Fuse Bits and Device Signature
20.1
Lock Bits
ATtiny48/88 provide the program and data memory lock bits listed in
Table 20-1.Notes:
1. “1” means unprogrammed, “0” means programmed.
Lock bits can be left unprogrammed (“1”) or can be programmed (“0”) to obtain the additional
Notes:
1. Program the Fuse bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Lock bits can be erased to “1” with the Chip Erase command, only.
The ATtiny48/88 has no separate Boot Loader section. The SPM instruction is enabled for the
whole Flash if the SELFPRGEN fuse is programmed (“0”), otherwise it is disabled.
Table 20-1.
Lock Bit Byte
Lock Bit Byte
Bit No
Description
Default Value
7
–
1 (unprogrammed)
6
–
1 (unprogrammed)
5
–
1 (unprogrammed)
4
–
1 (unprogrammed)
3
–
1 (unprogrammed)
2
–
1 (unprogrammed)
LB2
1
Lock bit
1 (unprogrammed)
LB1
0
Lock bit
1 (unprogrammed)
Table 20-2.
Lock Bit Protection Modes
(1)(2)Memory Lock Bits
Protection Type
LB Mode
LB2
LB1
1
No memory lock features enabled.
21
0
Further programming of Flash and EEPROM is disabled in
parallel and serial programming mode. Fuse bits are locked in
both serial and parallel programming mode
(1)30
0
Further reading and programming of Flash and EEPROM is
disabled in parallel and serial programming mode. Fuse bits are
locked in both serial and parallel programming mode
(1)